1. Field of the Invention
The present invention relates to an automatic threshold level control circuit, which automatically changes an threshold level of an input signal in response to the dynamic change of the power level of the input signals.
2. Background Art
Conventionally, an automatic threshold level control circuit for automatically controlling the threshold level in response to the dynamic changes of the power level has been used in a receiver in a burst digital light signal transmission system such as full service access network transmission system. One example of this type of automatic threshold level control circuit is disclosed in Japanese Patent Application, First Publication No. Hei 10-126349 entitled "Burst Light Receiving Circuit".
FIG. 6 is a circuit diagram showing an example of a feed-forward-type conventional automatic threshold level control circuit for determining the threshold level in response to the input signal. In the feed-forward-type ATC (Automatic Threshold Level Control) circuit 600 shown in FIG. 6, two pulse signals, in which amplitudes of respective pulse signals switch between normal phase or negative phase, are input into terminals ATCIN+ and ATCIN-, respectively. The input terminal ATCIN+ is connected to a peak value detecting circuit PD2 (64) and a resistor 1, and the input terminal ATCIN- is connected to a peak value detecting circuit PD1 (62) and a resistor 3. The peak value detecting circuit PD1 (62) holds the peak level of the input signal in a capacitor C.sub.pd1 and outputs the peak level. The peak value detecting circuit PD2 (64) resets the charged voltage of the capacitor C.sub.pd1 to the reference voltage V.sub.ref1 by turning on a MOS (Metal Oxide Semiconductor) transistor 63 connected to the capacitor C.sub.pd1, when the reset signals input to a terminal RST changes high level. Similarly, the peak value detecting circuit PD2 (64) holds the peak level of the input signal and outputs it. When the reset signals input to a terminal RST changes high level, the MOS transistor 65 connected to the capacitor C.sub.pd2 is turned on and the voltage of the capacitor C.sub.pd2 is reset.
Here, a buffer amplifier 61 connected to the feed-forward-type ATC circuit 600 outputs to the positive phase output terminal ATCOUT+ a voltage amplified after dividing the input voltage in the input terminal ATCIN+ and the output voltage V.sub.PD1 by the resistor R1 and the resistor R2 connected in series with the output of the peak value detecting circuit PD1 (62). The buffer amplifier 6 also outputs to the negative phase output terminal ATCOUT- a voltage amplified after dividing the input voltage to the input terminal ATCIN- and an output voltage V.sub.PD2 of the peak value detecting circuit PD2 (64).
FIG. 7 is a waveform diagram showing time dependent changes of operating voltages of each portion of the feed-forward-type ATC circuit 600 shown in FIG. 6 and an output voltage of the buffer amplifier 61. For the circuit shown in FIG. 6, the same reset signals RST are input into both the peak value detecting circuit PD1 (62) and PD2 (64) in the guard time between the burst signals. Consequently, in an example shown in FIG. 7, since the peak detecting circuit PD1 (62) holds the level where there are no signals, a DUTY ratio degradation will be caused which corresponds to the change of the duty ratio of the output pulse signal from that of the input signal when the level of the input signal "0" differs from that of no signal level.